Stimulus Generation and Logging - 2.0 English

RFSoC DFE PRACH LogiCORE IP Product Guide (PG391)

Document ID
PG391
Release Date
2024-05-30
Version
2.0 English

The stimulus generator drives all signals on the AXI4-Stream data input to the core and monitors register writes on the AXI4-Lite control interface. The monitoring interface allows the stimulus generator to update its internal configuration dynamically to match that of the DFE PRACH core. Only the relevant subset of the register map is monitored, including CC sequence length and trigger configurations.

The following figure illustrates when a trigger occurs with respect to API calls, in the order they appear in the example design default program.

Figure 1. DFE PRACH Example Design Functions and Triggers

At the end of the setup phase, the XDfePrach_Activate API function is called, resulting in the activate trigger event occurring. By default, the activate trigger is of the immediate type.

The CC sequence is then created and added to the PRACH configuration. The example design configures a CC sequence containing two active CCs, each running at 30.72 MHz, with a sub-carrier spacing (SCS) of 15 kHz. The active CC with an allocated CCID of 5, is configured to occupy position "0" in the CC sequence and the CC with an allocated CCID of 3, is configured to occupy position "1" in the CC sequence. This CC sequence configuration is valid for all PRACH hardware configurations. The CC configuration is built in software using XDfePrach_AddCCtoCCCfg.

Depending on the antenna interleave configured for one of the bands of the DFE PRACH core instance, one of the four example CC sequences shown below will be used.

Figure 2. CCID Sequence for Antenna Interleave of 1 (Sequence Length 16)

Figure 3. CCID Sequence for Antenna Interleave of 2 (Sequence Length 8)

Figure 4. CCID Sequence for Antenna Interleave of 4 (Sequence Length 4)

Figure 5. CCID Sequence for Antenna Interleave of 8 (Sequence Length 2)

After the CC sequence has been added, three RCIDs are configured. The RACH channels are configured as follows:

  • RCID 2, uses physical RACH channel lane 2 and captures data from CCID 5, at a frequency offset of 288 PRACH SCS/2 (equivalent to 180 kHz @1.25 kHz SCS).
  • RCID 4, uses physical RACH channel lane 4 and captures data from CCID 5, at a frequency offset of 3744 PRACH SCS/2 (equivalent to 2340 kHz @1.25 kHz SCS).
  • RCID 6, uses physical RACH channel lane 6 and captures data from CCID 3, at a frequency offset of -1440 PRACH SCS/2 (equivalent to -900 kHz @1.25 kHz SCS).

All are configured to have a continual capture schedule, meaning it is always performing decimation regardless of the current slot number. They are all configured with a PRACH SCS of 1.25 kHz, which implies the CCs, which are configured with an SCS of 15 kHz, are decimated by a factor of 24.

The RC configuration is built in software using XDfePrach_AddRCtoRCCfg. Once the CC and RC configurations are assembled in software, XDfePrach_SetNextCfg is called. This loads the configuration into the core and sets the RACH Update trigger and the Frame Init trigger in the core.

The RACH Update trigger is set to trigger IMMEDIATE and the Frame Init trigger should be set to trigger on TUSER bit 1.

The example design test bench recognizes that the PRACH has been programmed and begins sending data to the core on the S_AXIS_DIN_0 interface. As part of this process, the data generator will set TUSER bit 1 to indicate the start of frame. Once this trigger occurs, the core will align the scheduler with the data and begin processing.

Data is sourced from files named data_file_CC<x>_Ant<y>.txt. The 'x' indicates the CCID for which that files data is used; therefore, x has a range of 0-15. The 'y' indicates the antenna for which the file's data is used; therefore y has a range 0-7. Only data files for CCID 5 and CCID 3 are populated, and all other CCs are set to null.

The file extension in use is set by the module parameter FILE_EXTENSION. The default extension is .txt. The directory in which the data input files are located is specified by the module parameter DATA_FILE_PATH. The default path is the imports directory within the Vivado project.

The output checker captures the data coming from M_AXIS_DOUT_0 interface and compares it against a set of golden vectors. The vectors are stored in files called res_file_RCID<z>_Ant<y>.txt, where 'z' indicates the RCID number (0-15) of the output RACH and 'y' indicates the antenna number (0-7). Only data files for RCID 2, RCID 4, and RCID 6 are populated, and all other RACH outputs are set to null. The file extension and output directory are specified using the module parameters FILE_EXTENSION and DATA_FILE_PATH as for the stimulus generator.