Example Design - 2.0 English

RFSoC DFE PRACH LogiCORE IP Product Guide (PG391)

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2.0 English

This chapter contains information about the DFE PRACH example design provided in the AMD Vivado™ Design Suite.

Note: The example design is provided for simulation purposes only. Synthesis, implementation, and bitstream generation are not supported. Use of the example design is only supported in Linux.