Dynamic PRACH Scheduling - 2.0 English

RFSoC DFE PRACH LogiCORE IP Product Guide (PG391)

Document ID
PG391
Release Date
2024-05-30
Version
2.0 English

The dynamic PRACH scheduling mechanism allows the demodulation frequency, CCID source, decimation configuration, location, and duration for a PRACH capture to be controlled via an AXI4-Stream control interface. In order to make use of the dynamic scheduling mode, it must be enabled when the core is configured.

Dynamic scheduling instructions are provided in the form of a configuration packet. This is supplied to the core using the s_axis_sched interface. The dynamic configuration packet (DCP) consists of seven 32-bit words and is based on the structure of the ORAN C-Plane packet (see O-RAN-WG4.CUS.0 v6.00, table 5.6). The packet should arrive at least 1/32nd of a millisecond in advance of the intended start point of the PRACH capture.

The s_axis_sched interface is an AXI4-Stream interface. The operation of the s_axis_sched interface is illustrated below.

Figure 1. Timing Diagram for the s_axis_sched Interface

The s_axis_sched interface can accept AXI4-Stream data in which TVALID toggles, this is an update from v1.1, in which the s_axis_sched interface could only operate with packetized data, with TVALID remaining high for the duration of the packet. In v2.0, it is also possible that the TREADY can be deasserted by the DFE PRACH core while the packet is being received. This should only occur if several dynamic control packets are received sequentially.

The DFE PRACH core can accept sequential dynamic control packets, however it is expected that sequential packets apply to different RCIDs. If multiple dynamic control packets are sent to the same RCID, the first packet received for that RCID will be overwritten by the later packets.

If requesting multiple captures on the same RCID, it is necessary to wait until the first capture has begun (samples begin to output) before sending the second DCP. In this scenario, the second DCP will begin its capture at the scheduled time as long as that is after the first DCP has finished.

Figure 2. Timing Diagram for Multiple Captures on the Same RCID

It can be seen that the two DCP for the same RCID are input to the core such that the second DCP does not enter until the output samples from the first have begun. This allows captures to be specified such that the end of the first and the start of the second occur on consecutive slots. If targeting consecutive slots, the TLAST on the first capture will appear approximately 1/64th of 1 ms before the true end of slot (not indicated in figure). This is necessary to provide time to load the second DCP into the core.

Version 2.0 of the DFE PRACH core has changed the structure of the DCP from that used in version 1.1 and earlier. The latest version of the dynamic control packet exposes the decimation setting used in the dynamic capture. This allows greater control of the decimation rate, which is useful when extracting multiple PRACH channels adjacent in frequency (extracted as a single channel).

The updated DCP also exposes the NCO settings which allows an arbitrary demodulation frequency to be set, for instance, based upon the number of channels adjacent in frequency. In earlier versions, the NCO frequency was derived based upon the PRACH PRB values.

The updated dynamic control packet also allows the duration of the PRACH capture to be specified. In previous version, this was calculated based upon the frameStructure and the requested number of FFTs. The length of the capture is now specified directly as a number of slots.