The DFE PRACH IP core provides a high degree of flexibility for defining the time-division multiplexing (TDM) of the samples of multiple component carriers on the data input interface of each band. The desired component carrier sequence can be set up using software API calls, and activated at a chosen point in time using the TUSER-based triggering mechanism.

The aggregate carrier sample rate F_{s} available at
the core input of each band is given by the AXI4-Stream clock frequency F_{c} divided by the antenna interleave
factor AILV for that band, which can take a value of 1, 2, 4, or 8. This sample rate can
be allocated to a single carrier or divided up between multiple component carriers as
described below.

Each component carrier to be processed by the core must have a sample rate
F_{cc,n} that is equal to F_{c}/2,
F_{c}/4, F_{c}/8 or F_{c}/16. The sum of F_{cc,n} over all
active carriers (N_{AC}) for one band (n=0..N_{AC}-1) must be less than or equal to F_{s} and N_{AC}×AILV must be less than or equal to
16.

The data belonging to each component carrier is identified by a 4-bit value on
`s_axis_dinX_tid[7:4]`

(X represents the band index) known as the
component carrier identifier (CCID). The CCID sequence determines the order in which
carriers are multiplexed on the data bus. The sequence length L can be set to a value of
1, 2, 4, 8, or 16 when the core is activated via the API, where L×AILV is less than or
equal to 16.

The number of times the CCID for active carrier n appears in the CCID
sequence must be equal to F_{cc,n}×L÷F_{s}. The sequence entries for each active CC must exhibit a completely regular
spacing, appearing every N^{th} entry where N is 1, 2, 4, 8, or
16.

In a simple single-carrier configuration where one carrier uses the entire aggregate sample rate, no TDM is required. The component carrier sequence may have a length of one. Or, if the sequence length is greater than one, every element of the sequence must have the same value, which is the CCID assigned to that carrier.

When a single component carrier is present but its sample rate is less than the aggregate sample rate, some of the sample slots on the input interface will be unused. Which cycles contain data for the active component carrier and which are inactive is indicated by means of the CCID field. There is no CCID value specifically assigned to stand for an unused slot. Any CCID value that is not allocated to an active carrier can be used for this purpose.

For example, consider a configuration with 245.76 MSPS aggregate carrier sample rate and a single component carrier with a 61.44 MSPS sample rate, assigned to CCID 0. If the CCID sequence length has been set to 8, then a valid CCID sequence would be {0, 15, 15, 15, 0, 15, 15, 15}. Here, the dummy number 15 has been chosen to represent all the unused slots in the sequence. Other sequences such as {15, 0, 15, 15, 15, 0, 15, 15} are possible, provided that the number 0 (the CCID of the active carrier) appears in exactly 25% of the slots with a spacing of 4.

If two carriers are multiplexed, each carrier having half of the aggregate carrier sample rate, the TDM sequence alternates between the carriers and has a minimum length of two. For example, if a second 61.44 MSPS carrier with CCID 1 is added to previous example, then a valid CCID sequence would be {0, 1, 15, 15, 0, 1, 15, 15}. Another would be {0, 15, 1, 15, 0, 15, 1, 15}. The core supports an arbitrary interleaving of active carriers and unused slots within the sequence, provided that the regular spacing described above is always maintained for samples belonging to the same carrier.

Extending this multiplexing scheme to carriers with different sample rates is straightforward. For example, if the sample rate of the carrier with CCID 0 in the previous example is increased to 122.88 MSPS, then a valid CCID sequence would be {0, 1, 0, 15, 0, 1, 0, 15}. The value 0 appears in 50% of the slots because CCID 0 occupies 50% of the aggregate carrier bandwidth. The remaining 50% is split between CCID 1 (25%) and the unused samples (25%) denoted by dummy CCID 15.

When the antenna interleave factor is greater than 1, antenna data interleaving takes place at the level below the component carrier sequencing. All data samples for all antennas are transferred for the current carrier in the sequence before moving on to the next carrier.

The following diagram shows an example of the component carrier sequencing and how it interacts with the interleaving of samples for multiple antennas.

Here the number of antennas is 4, the antenna interleave factor is 2, and the sample width is 16 bits. There are three component carriers configured; they are numbered 2, 5, and 7. Carriers 5 and 7 each have half the sample rate of carrier 2. The resulting CCID sequence has a length of 4 and can be represented as {2, 5, 2, 7}. The I and Q parts of each sample in the diagram carry a pair of subscripts a,c where a is the antenna number and c is the component carrier ID. The number in parentheses after the sample is the time index of that sample within the carrier sample stream.

On the input data interface, the sequence of values on TID[7:4] is expected to match the programmed CC sequence. Where the antenna interleave factor AILV is greater than one, the value on TID[3:0] (shown as ailv in the previous diagram) is expected to count from 0 to AILV-1 within each element of the CCID sequence. The core monitors TID and reports a CC sequence error if a mismatch is detected on either of these sub-fields.

The clock cycle on which the component carrier interleaving sequence begins is set when the frame initialization is set for the core. This sequence start position cannot subsequently be changed unless the core is deactivated and reactivated. Frame initialization is performed independently for each band using one of the triggering mechanisms described in the following section. To ensure that the start position can be controlled precisely, a single-shot or continuous TUSER trigger type should be used for the frame initialization process.