Clock and Reset Ports - 2.0 English

RFSoC DFE PRACH LogiCORE IP Product Guide (PG391)

Document ID
PG391
Release Date
2024-05-30
Version
2.0 English
Port Name I/O Clock Description
s_axis_aclk I - Clock for AXI4-Stream interfaces and internal operation of block.
s_axis_aresetn I s_axis_aclk Active-Low asynchronous reset for AXI4-Stream interfaces and internal operation of block.
s_axi_aclk I - Clock for the memory mapped AXI interface.
s_axi_aresetn I s_axi_aclk Active-Low asynchronous reset for memory mapped AXI interface.