Variable Maximum Point Size - 1.0 English

RFSoC DFE Fast Fourier Transform LogiCORE IP Product Guide (PG390)

Document ID
PG390
Release Date
2024-05-30
Version
1.0 English

The maximum point size of the RFSoC DFE FFT IP core can also be varied dynamically.

Each processing stage of the FFT algorithm has dedicated hardware resources associated with it. When processing FFT operations with point sizes smaller than 4096, one or more of these stages are not required and are used simply to buffer the incoming data. To reduce latency and dynamic power, the maximum point size can be changed from 4096 to a smaller value using the control packet interface. This completely bypasses the unused stages and disables them.

Reducing the maximum point size setting can only be achieved when the section of the DFE FFT pipeline that would be disabled by the change is inactive. When the core receives a control packet containing a request to reduce the maximum point size, it checks whether it is safe to make the change or if doing so would cause data loss due to blocks that are currently in the pipeline. If it is safe to do so, the point size is changed at the commencement of FFT processing for the next data block. Otherwise, the maximum point size is left unaltered and the event_maxpt_ignored signal is asserted to indicate that the change could not be made.

To ensure that the request to change the maximum point size is accepted and that the latency reduction is achieved, stop providing input data to the core and wait until all blocks that are larger than the new maximum point size have been fully output before applying the maximum point size change.

Increasing the maximum point size only requires re-enabling logic that was previously disabled and inactive. Therefore, the core will always accept a request on the control packet interface to increase the maximum point size.