Overview - Overview - 1.0 English - PG390

RFSoC DFE Fast Fourier Transform LogiCORE IP Product Guide (PG390)

Document_ID
PG390
Release_Date
2024-05-30
Version
1.0 English

The following figure shows the structure of the example design.

Figure 1. Example Design

The design instantiates two copies of the FFT core. One instance is used for forward FFT processing and the other is used for inverse FFT processing. The core is capable of dynamically switching between FFT and iFFT operations, but this feature is not demonstrated here.

Both instances of the FFT core are parameterized identically, using the customizations that were selected in the IP configuration tab prior to generating the example design.