Example Design - 1.0 English

RFSoC DFE Fast Fourier Transform LogiCORE IP Product Guide (PG390)

Document ID
PG390
Release Date
2024-05-30
Version
1.0 English

This chapter contains information about the RFSoC DFE FFT example design provided in the AMD Vivado™ Design Suite. Note that the example design is provided for simulation purposes only. Synthesis, implementation, and bitstream generation are not supported.