Figure 1. Non-Synthesizable TG Options Tab
- AXI Address Width for Simulation
- 12 to 64
- AXI ID Width for Simulation
- 1 to 16
- AXI Test/Pattern Types
-
- Write only
- This test issues a continuous (that is, back to back) number (<N>) of Write transactions with an address delay of X. The value of X is calculated from the requested bandwidth. You can configure all AXI fields and the start/end address. This test does not support data integrity checking.
- Read only
- This test issues a continuous number (<N>) of Read transactions with an address delay of X (the value of X is calculated from the requested bandwidth). You can configure all AXI fields and the start/end address. This test does not support data integrity checking.
- Writes and reads in parallel
- This test issues a continuous number (<N>) of Write and Read transactions in parallel with an address delay of X. The value of X for the Read and Write channel is calculated from the requested Read and Write bandwidth respectively. You can configure all AXI fields and the start/end address. This test does not support data integrity checking.
- Writes followed by reads
- A number (<N>) of continuous Writes is issued and waits for all Write responses to be received. It then issues the N number of continuous Reads to the already written address. This test supports data integrity checking.
- Write read interleaved
- This test issues a number (<N>) of continuous Writes to the connected slave and issues Reads to the written address as soon as Write response is received. Each Read request is issued after receiving the Write response from the slave (it ensures that the slave has written the data). The Read request is sent to the written address of the corresponding BID. This test supports data integrity checking.
- User defined pattern
- Through the CSV file.
- Video pattern
- This test sequence generates a video pattern based on video format inputs from the Vivado IDE. To send a frame, the rows are sent one by one. If the Number of frame buffers is more than 1, consecutive frames are sent to a different address provided by Offset of Next Frame in Bytes. The total number of frames sent is controlled by the Number of frames to send parameter. The bandwidth is determined by the Frame rate parameter. There are two transaction options: Write only and Read only. This test does not support data integrity checking. Only RGB format is currently supported.
- Data Integrity Check
-
ON, OFF
- AXI Read Burst
- INCR, WRAP, FIXED
- AXI Read Size
- 1, 2, 4, 8, 16, 32, 64 (in bytes), and Exercise all Read Size
- AXI Read Length
- 0-255, Exercise all Read Length
- AXI Read Bandwidth (MBPS)
- 10-19200
- AXI Read Base Address
- Slave Base Address
- AXI Read High Address
- Slave High Address
- Number of read transactions
- 1-1000000
- Write Data Pattern Types
-
Constant Data
Random Data
Walking 1 Data
Walking 0 Data
Hammer Data
SRC ID as Data
ADDR as Data
ADDR as Data XOR
AXI ID as Data
AXI Burst as Data
AXI Length as Data
AXI Size as Data
AXI Cache as Data
- AXI Write Burst
-
INCR
WRAP
FIXED
- AXI Write Size
- 1, 2, 4, 8, 16, 32, 64 (in Bytes) and Exercise all Write Size
- AXI Write Length
- 0–255, Exercise all Write Length
- AXI Write Bandwidth (MBPS)
- 10–19200
- Number of Write transactions
- 1–1000000
- Path to user Defined Pattern File (CSV)
- The location of the CSV file must be added here.
When video pattern is selected for the AXI Test/Pattern types:
- Video Traffic Type
- Write, Read
- Samples per clock
- 1, 2, 4, 8, 16
- Horizonal Pixels Size
- 64–1920
- Vertical Pixels Size
- 64–1080
- Frame rate
- 10–100
- Number of bits per component
- 1-16
- Color format
- RGB
- Number of frame buffers
- 1–100
- Number of frames to send
- 1–100000