The AXI4-Stream interface specification restricts
TDATA widths to integer multiples of eight bits. Therefore, any bit data must be
padded with zeros on the MSB to form a N*8 bit wide vector before connecting to
s_axis_video_tdata. Padding does not affect the size of the
core.
Similarly, data on the AXI4-Stream Remapper core
output m_axis_video_tdata is packed and padded to
multiples of eight bits as necessary. Zero padding the most significant bits is only
necessary for 10 and 12 bit wide data as the total data width is not a multiple of
8. The following five figures explain the pixel mapping of AXI4-Stream interface with 2 pixels per clock and 10 bits per
component configuration for all supporting color formats. Zero padding (bits
[63:60]) is not shown in the following figures. Given that the AXI4-Stream Remapper core requires hardware configuration
for three component video, the AXI4-Stream Subset
Converter is needed to hook up with other IPs of two component video interface in
YUV 4:2:2 and YUV 4:2:0 color format. Refer to Appendix B, Upgrading in the AXI4-Stream Video IP and
System Design Guide (UG934) for more information.
