Synthesizable Example Design - 1.1 English

AXI4-Stream Remapper LogiCORE IP Product Guide (PG379)

Document ID
PG379
Release Date
2024-07-18
Version
1.1 English

The difference between the synthesizable design and the simulation example design is the use of the MicroBlaze microprocessor instead of the AXI VIP core as the AXI master. The locked port of the AXI4-Stream to Video Out is connected to axi_gpio_lock core and MicroBlaze polls the corresponding register for a sign that the test passed. Because this design runs on hardware, it demonstrates the accuracy of AXI4-Stream Remapper cores running a large video frame.