Running the Software Application - 1.1 English

AXI4-Stream Remapper LogiCORE IP Product Guide (PG379)
Document ID
PG379
Release Date
2024-07-18
Version
1.1 English
Important: Ensure that the hardware is powered on and a Digilent Cable or an USB Platform Cable is connected to the host PC. Also, ensure that a USB cable is connected to the UART port of the KC705 board.
  1. Launch the Vitis software platform.
  2. Set workspace to vaxi4s_remapper_example.sdk folder in the window. The Vitis project opens automatically. If a Welcome page shows up, close that page.
  3. Download the bitstream into the FPGA by selecting Xilinx Tools > Program FPGA. The Program FPGA dialog box opens.
  4. Ensure that the Bitstream field shows the bitstream file generated by Tcl script, and then click Program.
    Note: The DONE LED on the board turns green if the programming is successful.
  5. A terminal program (HyperTerminal or PuTTY) is needed for UART communication. Open the program, choose appropriate port, set baud rate to 115200 and establish a serial port connection.
  6. Select and right-click the application vaxi4s_remapper_example_design in the Project Explorer panel.
  7. Select Run As > Launch on Hardware (System Debugger).
  8. Select Binaries and Qualifier in the window and click OK.
The example design test result are shown in the terminal program.
For more information, visit www.xilinx.com/tools/vitis.htm. When executed on the board, the example application performs the following:
  • Programs the Video Clock Generator to 1080p@60 Hz
  • Programs TPG0 and Remap0 to 1080p@60 Hz
  • Checks for video lock and report the status (PASS/FAIL) on UART
  • Repeat Steps 1-3 for 4KP@30 Hz and 4KP@60 Hz