Important: Ensure that the hardware is powered on and a Digilent Cable or
an USB Platform Cable is connected to the host PC. Also, ensure that a USB cable is
connected to the UART port of the KC705 board.
- Set Up the WorkspaceOpen the Vitis application and select .
- Create a Platform Component
- Navigate to .
- Enter the component name and location, and click Next.
- Select the hardware design XSA file generated using Vivado.
- Select the operating system, processor, and compiler.
- Review the summary and click Finish.
- Create an Embedded Application Component
- Open the Welcome panel.
- Navigate to and select Create Empty
Embedded Application.
- Enter the component name and location, and click Next.
- In the Hardware
tab, select the required platform and click Next.
- Select the appropriate domain from the available list.
- (Optional) Add source files, review the summary, and click Finish.
- Import Source Files
- If source files were not added during creation, import them manually.
- Right-click Sources and select .
- Select and import the required files.
- Build the Project
- Select .
- When prompted to build the platform, click Yes.
- Verify the Output
After the build completes, navigate to the Output folder and verify that the .elf file is generated.
The example design test result are shown in the
terminal program.
For more information, visit https://www.amd.com/en/products/software/adaptive-socs-and-fpgas/vitis.html.
When executed on the board, the example application performs the following:
- Programs the Video Clock Generator to 1080p@60 Hz
- Programs TPG0 and Remap0 to 1080p@60 Hz
- Checks for video lock and report the status (PASS/FAIL) on UART
- Repeat Steps 1-3 for 4KP@30 Hz and 4KP@60 Hz