- Select the AXI4-Stream Remapper IP from IP catalog.
- Double-click the selected IP or right-click the IP and select Customize IP from the menu.
- Configure the build-time parameters in the Customize IP window and click OK. The AMD Vivado™ IDE generates an example design matching the build-time configuration.
- In the Generate Output Products window, select Generate or Skip. If Generate is selected, the IP output products are generated.
- Right-click AXI4-Stream Remapper in the Sources panel and select Open IP Example Design from the menu.
- In the Open IP Example Design window, select the example project directory and click OK. The Vivado software then runs automation to generate example design in the selected directory.
The generated project contains two example
designs. The following figure shows the Sources panel of the
example project. The synthesizable example block design, along with the top-level file,
reside in the Design Sources catalog. The
corresponding constraint file is also provided for the synthesizable example design.
Simulation example design files (including block design file, System Verilog test bench,
and another task file) are under the Simulation Sources.
Figure 1. Example Project Source Panel
