The synthsizable example design requires
both Vivado tools and the Vitis
software platform. The first step is to run synthesis, implementation and bitstream
generation in Vivado. After all those steps are done,
select . In the window, select Include
bitstream, select an export directory and click OK. The remaining work is performed in the Vitis software platform. The AXI4-Stream Remapper example design file can be found in the Vitis directory: <install_directory>/<version>/data/embeddedsw/XilinxProcessorIPLib/drivers/v_axi4s_remapper_v1_3/examples/
Example application design source files (contained in the examples folder) are tightly coupled with the v_axi4s_remapper example design available in Vivado Catalog.
vaxi4s_remapper_example.tcl automates the process of generating the downloadable bit and elf files from the provided example xsa file.
To run the provided Tcl script:
- Copy the exported example design hdf file in the examples driver directory.
- Launch the Software Command-Line Tool (
xsct) terminal. - At the prompt, navigate to the examples directory.
- Source the Tcl
file.
xsct%>source vaxi4s_remapper_example_kc705.tcl - Execute the
script.
xsct%>vaxi4s_remapper_example <xsa_file_name.xsa>The Tcl script performs the following:
- Create workspace
- Create HW project
- Create BSP
- Create Application Project
- Build BSP and Application Project
After the process is complete, the following required files are available in:
- bit file: vaxi4s_remapper_example_hw_platform/hw folder
- elf file: vaxi4s_remapper_example.sdk/vaxi4s_remapper_example_design/{Debug/Release} folder
Perform the steps described in the Running the Software Application section.