Common Interface Signals - 1.1 English

AXI4-Stream Remapper LogiCORE IP Product Guide (PG379)

Document ID
PG379
Release Date
2024-07-18
Version
1.1 English
Table 1. Common Interface Signals
Port Name I/O Description
ap_clk I Clock for AXI4-Stream interface and AXI Slave bus
ap_reset_n I Active-Low reset for AXI4-Stream interface and AXI Slave bus
interrupt O Interrupt Request Pin

The AP_CLK and AP_RST_N signals are shared between the core, the AXI4-Stream data interfaces, and the AXI4-Lite control interface. The INTERRUPT pin is not supported and reserved for future use.