Example 2 - 1.0 English

Dynamic Function eXchange Decoupler LogiCORE IP Product Guide (PG375)

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1.0 English

The following figure shows a more complex decoupler without clock domain crossing. This decoupler handles an AXI4-Stream interface called DATA and a FIFO Write channel interface called FIFO.

Figure 1. Example 2 With No Clock Domain Crossing

The following figure shows the same example, but with a three-stage clock domain crossing synchronizer on the DATA interface and a two-stage clock domain crossing synchronizer on the FIFO interface. Both of these interfaces have their own reference clock (DATA_ref_clk and FIFO_ref_clk) but decouple_ref_clk is not needed in this example because there is already an AXI clock for the control interfaces.

Figure 2. Example 2 With Clock Domain Crossing Enabled