References - 1.3 English - PG371

Versal Adaptive SoC Integrated 600G Interlaken with FEC Subsystem Product Guide (PG371)

Document ID
PG371
Release Date
2025-05-29
Version
1.3 English

These documents provide supplemental material useful with this guide:

  1. AXI to APB Bridge LogiCORE IP Product Guide (PG073)
  2. Versal Devices Integrated 100G Multirate Ethernet MAC (MRMAC) LogiCORE IP Product Guide (PG314)
  3. Vivado Design Suite: AXI Reference Guide (UG1037)
  4. Interlaken Protocol Definition, Revision 1.2, October 7, 2008
  5. Interlaken Reed-Solomon Forward Error Correction Extension Protocol Definition, Revision 1.1, February 2020
  6. IEEE Standard for Ethernet (IEEE Std 802.3-2022)
  7. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
  8. Vivado Design Suite User Guide: Designing with IP (UG896)
  9. Vivado Design Suite User Guide: Getting Started (UG910)
  10. Vivado Design Suite User Guide: Logic Simulation (UG900)
  11. Versal Adaptive SoC Transceivers Wizard LogiCORE IP Product Guide (PG331)
  12. Vivado Design Suite User Guide: Programming and Debugging (UG908)
  13. Interlaken 150G LogiCORE IP Product Guide (PG212)
  14. Interlaken 600G LogiCORE IP Product Guide (PG209)
  15. Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)