Memory Map - 1.3 English - PG371

Versal Adaptive SoC Integrated 600G Interlaken with FEC Subsystem Product Guide (PG371)
Document ID
PG371
Release Date
2025-05-29
Version
1.3 English

The AXI4-Lite interface enables access to the ILKNF configuration registers.

Table 1. ILKNF Memory Map
Base Address Region
0x0000 Revision registers
0x0004 Configuration registers