The DCMAC FixedE path employs an internal time-sliced MAC that is a channelized
core. When adding, removing, or reconfiguring ports, it is usually not appropriate to do
a global reset (tx_core_reset). Instead, individual ports can be
reset/cleared/flushed independently. Port flushes (and corresponding PHY resets) on
reconfigured ports does not affect other active ports that are not being
reconfigured.
When following the startup procedure for port reconfiguration,
stat_tx_local_fault for a particular port does not assert while the
PHY is in reset. AMD recommends using
stat_tx_local_fault to ensure that the MAC is initialized and the
port is clear. Use the following procedure:
- Assert
tx_channel_flushandtx_serdes_reseton any active ports that are being reconfigured (or deactivated). - Assert
tx_channel_flushandtx_serdes_reseton any inactive ports that are being reconfigured to become active. - Release
serdes_resetfor active ports. - Wait for 100 (minimum) core clock cycles or 50 APB3 cycles (when APB3 frequency is less than or equal to half of core clock rate – which is usual).
- Check/wait for
stat_tx_local_faulton active ports. - Release
tx_channel_flushfor active ports.