Synthesizing and Implementing the Example Design - Synthesizing and Implementing the Example Design - 3.2 English

Synthesizing and Implementing the Example Design - Synthesizing and Implementing the Example Design - 3.2 English - PG369

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) v3.2 LogiCORE IP Product Guide (PG369)

Document_ID

PG369

Release_Date

2026-07-22

Version

3.2 English

To run synthesis and implementation on the example design in the Vivado Design Suite, perform the following steps:

Go to the XCI file, right-click, and select Open IP Example Design. A new Vivado tool window opens with the project name example_project in the project directory.
In the Flow Navigator, click Run Synthesis and Run Implementation

Tip: Click Run Implementation first to run both synthesis and implementation. Click Generate Bitstream to run synthesis, implementation, and bitstream.