Synthesizing and Implementing the Example Design - 3.1 English - PG369

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2025-12-03
Version
3.1 English

To run synthesis and implementation on the example design in the Vivado Design Suite, perform the following steps:

  1. Go to the XCI file, right-click, and select Open IP Example Design. A new Vivado tool window opens with the project name example_project in the project directory.
  2. In the Flow Navigator, click Run Synthesis and Run Implementation
Tip: Click Run Implementation first to run both synthesis and implementation. Click Generate Bitstream to run synthesis, implementation, and bitstream.