The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 12/03/2025 Version 3.1 | |
| IP Facts | Added link to Supported S/W Driver row. |
| Port FEC Modes | Updated rx_serdes_albuf_slip description. |
| AXI4-Stream Interface | Added endian description. |
| GT Reset Control Ports | Added note 3 reference to Validating the Example Design. |
| Interface Endianness | Added section. |
| GT Quad Integration with AMD IP Cores | Added Legacy GT Wizard note. |
| Customizing and Generating the Subsystem | Added note 3 in table. |
| DCMAC Configuration Tab | Updated figures. |
| GT Info and Parameters Tab | Updated figure. |
| User Interface | Added AM002 and AM017 links. |
| Running a Simulation | Added Legacy GT Wizard description. |
| Validating the Example Design | Added note. |
| Auto-Negotiation and Link Training | Added section. |
| 06/11/2025 Version 3.0 | |
| Clocking Relationships | Added note #3. |
| GT Reset Control Ports | Updated gtwiz_reset_all_in<0-5> and added note. |
| Almost Full | Updated IDLE description. |
| Flex Interface | Added note description. |
| Customizing and Generating the Subsystem | Added note. |
| DCMAC Configuration Tab | Updated figures and descriptions. |
| GT Info and Parameters Tab | Updated figure. |
| User Parameters | Added new parameters and descriptions. |
| Example Design | Updated description. |
| Example Design Hierarchy | Added DCMAC example design with gtwiz_versal IP. |
| Validating the Example Design | Updated description. |
| Supported Simulators | Added Aldec Riviera-PRO. |
| Simulation Speed Up | Added Riviera-PRO vlog option. |
| 02/12/2025 Version 2.5 | |
| AXI4-Stream for Coupled MAC+PCS Mode | Updated AXI4-Stream for Coupled MAC+PCS Mode. |
| Statistics Ports | Clarified rx_lane_aligner_fill signal. |
| RS-FEC Statistics TDM Ports | Updated table. |
| DCMAC Configuration Tab | Updated screenshots. |
| Synthesizing and Implementing the Example Design | Added section on Validating the Example Design. |
| Flex Interface Signaling for 200G FlexO Operation | Updated table |
| Flex Interface Signaling for 400G FlexO Operation | Updated table |
| Flex Interface Signaling for 50G FEC-Only Operation | Updated table |
| FEC-Only and FlexO Modes | Revised section |
| 08/05/2024 Version 2.4 | |
| Transceiver (SerDes) Modes | Updated. |
| Reset Port Description | Updated. |
| Customizing and Generating the Subsystem | Updated. |
| DCMAC Configuration Tab | Updated. |
| Custom Alignment Marker Setting | Added. |
| Flex Interface | Updated. |
| 11/08/2023 Version 2.3 | |
| Transceiver (SerDes) Modes | Updated Tranceiver GT Quad Operating Modes |
| Customizing and Generating the Subsystem | Updated DCMAC Supported Configuration in Vivado IDE |
| DCMAC Configuration Tab | Updated Screenshots |
| 08/08/2023 Version 2.2 | |
| DCMAC FEC Only Configuration Example Design | Added the topic. |
| Document title | Changed the title to Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem. |
| 04/12/2023 Version 2.1 | |
| Pause Operation | Added the section |
| Entire document |
|
| 01/27/2023 Version 2.1 | |
| Simulation Speed Up | Added AMD Vivado™ Simulator. |
| Entire document | General updates. |
| 09/05/2022 Version 2.0 | |
| Initial release | N/A |