PTP 1588 Timer Syncer IP - PTP 1588 Timer Syncer IP - 3.2 English - PG369

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) v3.2 LogiCORE IP Product Guide (PG369)

Document_ID
PG369
Release_Date
2026-07-22
Version
3.2 English

The PTP 1588 Timer Syncer IP provides reference time to all the Ethernet ports in the example design. It implements an IEEE1588 real-time clock timer and can accurately recreate the 1588 timer in a local port’s clock domain.

Features

  • Can be configured as Master System Timer, Master System, and Port Timer
  • Supports the ToD (Sec – NanoSec) and Continuous/Correction Time (CF) formats
  • Implements External ToD bus interface logic for synchronization to high precision clock sources
  • Crosses System ToD to port timer’s clock domain
  • AXI4-Lite I/F for configuration and monitoring

For more information, refer to the PTP 1588 Timer Syncer IP section in the Versal Devices Integrated 100G Multirate Ethernet MAC (MRMAC) LogiCORE IP Product Guide (PG314).