Figure 1. 1x400GAUI-8 GTM PAM4
Figure 2. 6x100GAUI-2 GTM PAM4
Figure 3. 3x200GAUI-4 GTM PAM4
For dynamic configuration, there are Phase Aligned FIFOs placed in-between DCMAC and GT at the TX data path.
The Phase Aligned FIFO is an asynchronous XPM FIFO module with
wr_clk and rd_clk. The reset of the Phase Aligned
FIFOs are connected with the gttxresetout from the GT Reset Controller
IP within the DCMAC core wrapper.
The wr_clk and rd_clk connections for the
Phase Aligned FIFOs are based on the dynamic switching configurations configured in the
DCMAC IP GUI.