AXI4-Stream Interface Signaling for 400G Operation - 3.1 English - PG369

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)
Document ID
PG369
Release Date
2025-12-03
Version
3.1 English

Segmented AXI4-Stream 400G operation uses a 1024-bit data bus. Only one 400G port can be active.

Table 1. 1 x 400G Segmented AXI4-Stream Signaling
Port Segment(s) Interface Function Signaling
0 M=0…7 RX AXI-S valid rx_axis_tvalid_0
preamble_out[55:0] rx_preambleout_0[55:0]
seg<M>_data[127:0] rx_axis_tdata<M>[127:0]
seg<M>_ena rx_axis_tuser_ena<M>
seg<M>_sop rx_axis_tuser_sop<M>
seg<M>_eop rx_axis_tuser_eop<M>
seg<M>_err rx_axis_tuser_err<M>
seg<M>_mty[3:0] rx_axis_tuser_mty<M>[3:0]
0 M=0…7 TX AXI-S ready tx_axis_tready_0
almost_full tx_axis_taf_0
valid tx_axis_tvalid_0
preamble_in[55:0] tx_preamblein_0[55:0]
ptp_cf_offset_in[13:0] tx_ptp_cf_offset_in_0[13:0]
ptp_tag_field_in[7:0] tx_ptp_tag_field_in_0[7:0]
ptp_udp_chksum_in tx_ptp_udp_chksum_in_0
ptp_1588op_in[1:0] tx_ptp_1588op_in_0[1:0]
ptp_cf_offset_in[13:0] tx_ptp_cf_offset_in_2[13:0]
ptp_tag_field_in[7:0] tx_ptp_tag_field_in_2[7:0]
ptp_udp_chksum_in tx_ptp_udp_chksum_in_2
ptp_1588op_in[1:0] tx_ptp_1588op_in_2[1:0]
seg<M>_data[127:0] tx_axis_tdata<M>[127:0]
seg<M>_ena tx_axis_tuser_ena<M>
seg<M>_sop tx_axis_tuser_sop<M>
seg<M>_eop tx_axis_tuser_eop<M>
seg<M>_err tx_axis_tuser_err<M>
seg<M>_mty[3:0] tx_axis_tuser_mty<M>[3:0]