100GE for Ethernet mode - 2.4 English

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2024-08-05
Version
2.4 English

The custom alignment marker signals are used as follow.

Custom Signal Bits Usage
ctl_vl_marker_id0 [63:0] Alignment marker for pcs lane 0
ctl_vl_marker_id1 [63:0] Alignment marker for pcs lane 1
ctl_vl_marker_id2 [63:0] Alignment marker for pcs lane 2
ctl_vl_marker_id3 [63:0] Alignment marker for pcs lane 3
ctl_vl_marker_id4 [63:0] Alignment marker for pcs lane 4
ctl_vl_marker_id5 [63:0] Alignment marker for pcs lane 5
ctl_vl_marker_id6 [63:0] Alignment marker for pcs lane 6
ctl_vl_marker_id7 [63:0] Alignment marker for pcs lane 7
ctl_vl_marker_id8 [63:0] Alignment marker for pcs lane 8
ctl_vl_marker_id9 [63:0] Alignment marker for pcs lane 9
ctl_vl_marker_id10 [63:0] Alignment marker for pcs lane 10
ctl_vl_marker_id11 [63:0] Alignment marker for pcs lane 11
ctl_vl_marker_id12 [63:0] Alignment marker for pcs lane 12
ctl_vl_marker_id13 [63:0] Alignment marker for pcs lane 13
ctl_vl_marker_id14 [63:0] Alignment marker for pcs lane 14
ctl_vl_marker_id15 [63:0] Alignment marker for pcs lane 15
ctl_vl_marker_id16 [63:0] Alignment marker for pcs lane 16
ctl_vl_marker_id17 [63:0] Alignment marker for pcs lane 17
ctl_vl_marker_id18 [63:0] Alignment marker for pcs lane 18
ctl_vl_marker_id19 [63:0] Alignment marker for pcs lane 19