XHDMIPHY1_HDMI_HANDLER_RXREADY - 1.2 English

HDMI 2.1 Receiver Subsystem v1.2 Product Guide (PG351)

Document ID
PG351
Release Date
2023-10-31
Version
1.2 English

This interrupt is triggered every time the HDMI PHY Controller /HDMI GT Subsystem RX reset lock is done.

The callback function must perform the following:

  1. Check the HDMI PHY Controller /HDMI GT Subsystem PLL type.
    XHdmiphy1_PllType XHdmiphy1_GetPllType(XHdmiphy1 *InstancePtr,
                                           u8 QuadId,
                                           XHdmiphy1_DirectionType Dir,
                                           XHdmiphy1_ChannelId ChId);
  2. Set the HDMI 2.1 RX Subsystem video stream according to the PLL type.
    XV_HdmiRxSs1_SetStream(XV_HdmiRxSs1 *InstancePtr,
                           u32 Clock,
                           u32 LineRate);

    where both Clock and LineRate are from the HDMI PHY Controller /HDMI GT Subsystem data structure.

Follow the steps in Example Design chapter to create an example design, which contains all the procedures implemented and can serve as a reference for integrating the HDMI 2.1 RX Subsystem into your system.