IP Facts - IP Facts - 1.2 English - PG351

HDMI 2.1 Receiver Subsystem v1.2 Product Guide (PG351)
Document ID
PG351
Release Date
2025-11-20
Version
1.2 English
Subsystem Facts Table
Subsystem Specifics
Supported Device Family 1

AMD Versal™ Adaptive SoCs (GTYE5, GTYP)

AMD UltraScale+™ Families (GTHE4, GTYE4) 2

Supported User Interfaces AXI4-Lite, AXI4-Stream, Native Video, Native DE Video
Resources

Performance and Resource Utilization web page

Provided with Subsystem
Design Files RTL
Example Design AMD Vivado™ IP integrator and associated software application example
Test Bench Not Provided
Constraints File XDC
Simulation Model Not Provided
Supported S/W Driver 3 Standalone, Linux
Tested Design Flows 4
Design Entry Vivado Design Suite
Simulation Not Provided
Synthesis Vivado Synthesis
Support
Release Notes and Known Issues Master Answer Record: 72276
All Vivado IP Change Logs Master Vivado IP Change Logs: 72775
Support web page
  1. For a complete list of supported devices, see the Vivado IP catalog.
  2. For GTHE4, -1,-1M, -1L, -1LV, -2LV, and -2LVI parts, and for GTYE4, -1,-1M,-1L, and -1LV parts, the maximum supported FRL line rate is 8.0 Gb/s due to the limitation on CPLL and USRCLKs.
  3. Standalone driver details can be found in <Install Directory>/Vitis/<Release>/data/embeddedsw/doc/xilinx_drivers_api_toc.htm.

    Linux OS and driver support information is available from the Linux HDMI 2.1 RX Driver Page.

  4. For the supported versions of third-party tools, see the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973).