HDCP - HDCP - 1.2 English - PG351

HDMI 2.1 Receiver Subsystem v1.2 Product Guide (PG351)

Document ID
PG351
Release Date
2025-11-20
Version
1.2 English

As part of the HDMI 2.1 RX Subsystem, the AMD LogiCORE IP High-bandwidth Digital Content Protection (HDCP) receivers are designed to receive audiovisual content securely between two devices that are HDCP capable. In this HDMI 2.1 RX Subsystem, both HDCP 1.4 and HDCP 2.3 receiver IP cores are included and can be enabled by the HDCP option in the Vivado IDE.

As a guideline, HDCP 2.3 decrypts all protected content in FRL mode. In TMDS mode, HDCP 2.3 decrypts content at Ultra-High Definition (UHD) while HDCP 1.4 is the legacy content protection scheme for lower resolutions backward compatible with HDCP 1.4 only sinks.

The following figure shows the HDMI RX configuration enabling both HDCP 1.4 and 2.3. With both HDCP protocols enabled, the HDMI Subsystem configures itself in the cascade topology, connecting the HDCP 1.4 and HDCP 2.3 back-to-back. The HDCP Egress interface of the HDMI receiver sends encrypted audiovisual data, which the active HDCP block decrypts and sends back into the HDMI receiver over the HDCP Ingress interface to send to other video processing modules in the system through AXI4-Stream Video interface.

Figure 1. HDCP 1.4 and HDCP 2.3 over HDMI Receiver

For more details on HDCP, see the HDCP 1.x Product Guide (PG224) and the HDCP 2.2 LogiCORE IP Product Guide (PG249).

Important: HDMI IP supports HDCP 2.3; however, all logs are shown as 2.2 which will be fixed in a future release.