Target Function Register (0x240C) - 3.4 English - PG347

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)
Document ID
PG347
Release Date
2025-05-29
Version
3.4 English
Table 1. Target Function Register (0x240C)
Bit Default Access Type Field Description
[31:8] 0 NA Reserved Reserved
[7:0] 0 RW target_fn_id This field is for PF use only.

The FN number which the current operation is targeting.