Root Port BAR - Root Port BAR - 3.4 English - PG347

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document_ID
PG347
Release_Date
2026-07-31
Version
3.4 English

Root Port BAR does not support packet filtering (all TLPs received from PCIe link are forwarded to the user logic), however Address Translation can be configured to enable or disable, depending on the IP configuration.

In Root Port configuration, the design accepts all incoming PCIe transactions and assumes a BAR0 hit for address translation into the AXI address domain. If address translation is not required, configure the PCIe BAR size to the largest supported value by selecting the 64‑bit BAR option and 8 Exabytes, and set PCIe to AXI Translation to 0.

Note: The IP must not receive any TLPs outside of the PCIe BAR range from the PCIe link when RP BAR is enabled.

The Root Port BAR customization options in the Vivado Design Suite are found in the PCIe BARs Tab.