Queue Status Data - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

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3.4 English
Table 1. Queue Status Data
qsts_out_data Field Description
[1:0] err Error code reported by the CMPT Engine.

0: No error

1: SW gave bad Completion CIDX update

2: Descriptor error received while processing the C2H packet

3: Completion dropped by the C2H Engine because Completion Ring was full

[2] retry_marker_req An Interrupt could not be generated in spite of being enabled. This happens when an Interrupt is already outstanding on the queue when the marker request was received. The user logic must wait and retry the marker request again if an Interrupt is desired to be sent.
[26:3] marker_cookie When the CMPT Engine sends a marker to the interface, it sends the lower 24b of the CMPT as part of the marker response on the interface. Thus the user logic can place a 24b value in the CMPT when making the marker request and it will receive the same 24b with the marker response. When the marker is generated as a result of an error that the CMPT Engine encountered (as opposed to a marker request made by the user logic), then this 24b field is don't care.
Note: Even if the user has enabled stamping of error and/or color bits in the CMPT writes to the host, the marker_cookie does not contain them. It is exactly the lower 24-bits of the CMPT that the user logic provided to the QDMA when making the marker request.
[63:27] rsv Reserved