MCAP Write Data Register (0x14, WO) - 3.4 English - PG346

Versal Adaptive SoC CPM Mode for PCI Express Product Guide (PG346)

Document ID
PG346
Release Date
2024-11-22
Version
3.4 English

The MCAP Write Data Register is used to provide data that will used for the AXI transactions that will be generated to the NOC infrastructure. The MCAP will generate 32-bit write transactions to the NOC infrastructure when the MCAP 128-bit Mode is set to zero and 128-bit NOC transactions when the MCAP Mode bit is set to 1. For 128-bit transactions the data from 4 MCAP Write Data Registers will be coalesced into a single 128-bit AXI transaction.