MCAP Register Description - 3.4 English - PG346

Versal Adaptive SoC CPM Mode for PCI Express Product Guide (PG346)

Document ID
PG346
Release Date
2024-11-22
Version
3.4 English

Register 0x00 has fields and values defined by the PCI-SIG. Register 0x01 has fields defined by PCI-SIG and values defined by AMD. All remaining registers are defined by AMD and are specific to the values specified by the Extended Cap Header (0x00) and Vendor Specific Header (0x01).

Register Name (Versal S80 Base Address= 0x350) Register Byte Offset Reg Type
MCAP PCI Express Extended Capability Header 0x00 Read Only
MCAP Vendor-Specific Header 0x04 Read Only
MCAP Status Register 0x08 Read Only
MCAP Control Register 0x0C Read/Write
MCAP Read/Write Address Ox10 Write Only
MCAP Write Data Register 0x14 Write Only (Read 0)
MCAP Register Read Data 0x18 Read Only