The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 05/29/2025 Version 1.1 | |
| Basic Tab | Updated figure. |
| Advanced Settings Tab | Updated figure. |
| Generating Example Design | Updated figure. |
| 11/22/2024 Version 1.0 | |
| Versal Adaptive SoC PHY for PCI Express Unsupported Features | Updated section. |
| Versal Premium Adaptive SoC PHY for PCI Express Unsupported Features | Updated section. |
| Clock and Rest Signals Interface Ports | Updated Clock and Reset Signals table. |
| RX Equalization Signals for Third-Party MAC | Updated RX Equalization Signals for Gen3 and Above Rate table. |
| PIPE RX Margin (To GT Quad) | Updated PIPE RX Margin (To GT Quad) table. |
| PIPE RX Margin (To MAC) | Updated PIPE RX Margin (To MAC) table. |
| Basic Tab | Updated section. |
| Constraining the Core | Updated section. |
| GT Selection and Pin Planning | Updated appendix. |
| Clocking | Updated section. |
| 06/05/2024 Version 1.0 | |
| Clock and Rest Signals Interface Ports | Updated Clock and Reset Signals table. |
| TX Data Signals | Updated TX Data Signals table. |
| RX Data Signals | Updated RX Data Signals table. |
| Status Signals Interface Ports | Updated Status Signals table. |
| TX Equalization Interface Ports for Third-Party MAC | Updated TX Equalization Signals for Gen3 and Above Rate table. |
| RX Equalization Signals for Third-Party MAC | Updated RX Equalization Signals for Gen3 and Above Rate table. |
| TX Equalization Signals for Gen3 and Above Rate (for AMD MAC) | Updated TX Equalization Signals for Gen3 and Above Rate (for AMD MAC) table. |
| Clocking | Updated section. |
| Basic Tab | Updated section. |
| Generating Example Design | Updated section. |
| GT Quad Locations | Updated Available GT Quads table. |
| 11/01/2023 Version 1.0 | |
| Versal Premium Adaptive SoC PHY for PCI Express Support | Updated Default Features Supported table. |
| Versal Adaptive SoC PHY for PCI Express Unsupported Features | Updated. |
| TX Data Signals | Updated TX Data Signals table. |
| RX Data Signals | Updated RX Data Signals table. |
| Command Signals Interface Ports | Updated Command Signals table. |
| Advanced Settings Tab | Updated form factor driven insertion loss adjustment description. |
| 11/04/2022 Version 1.0 | |
| Minimum Device Requirements | Updated GTYP-Based Soft PHY for PCIe Maximum Configurations table. |
| 04/26/2022 Version 1.0 | |
| General updates | Updated for Versal Premium Adaptive SoC support. |
| Debug Guide | New section |
| Upgrading | New section |
| Customizing and Generating the Core | Updated figures |
| GT Selection and Pin Planning for Versal Premium | Updated |
| Assigning GT Locations | Updated |
| Clocking | Updated |
| Constraining the Core | Updated |
| 10/15/2021 Version 1.0 | |
| Minimum Device Requirements | New section. |
| 11/24/2020 Version 1.0 | |
| GT Selection and Pin Planning | New appendix. |
| 07/16/2020 Version 1.0 | |
| Initial release | N/A |