Customizing the Core - 1.0 English

Versal Adaptive SoC PHY for PCI Express LogiCORE IP Product Guide (PG345)

Document ID
PG345
Release Date
2024-06-05
Version
1.0 English

You can customize the IP for use in your design by specifying values for the various parameters associated with the IP core using the following steps:

  • Versal adaptive SoC PCIe PHY IP has to be used in the Vivado IP integrator canvas.
  • Double-click the PHY IP and configure to the desired configuration.

For details, see the Vivado Design Suite User Guide: Designing with IP (UG896) and the Vivado Design Suite User Guide: Getting Started (UG910).

Note: Figures in this chapter are illustrations of the Vivado Integrated Design Environment (IDE). The layout depicted here might vary from the current version.

The Customize IP dialog box for the PCIe® PHY IP consists of the following tabs:

  1. Basic Tab
  2. Advanced Settings Tab