QDMA_C2H_MM_* QDMA+H2C_MM_* registers represent two engines namely MM0 and MM1. In the register .csv file, it is represented as an array [1:0]. Following are the register offsets for MM0 and MM1:
- QDMA_C2H_MM0 start at 0x1000
- QDMA_C2H MM1 start at 0x1100
- QDMA_H2C_MM0 start at 0x1200
- QDMA_H2C_MM1 start at 0x1300