Output Logging - Output Logging - 1.1 English - PG343

Versal Adaptive SoC Integrated Block for PCI Express LogiCORE IP Product Guide (PG343)

Document_ID
PG343
Release_Date
2026-08-07
Version
1.1 English

When a test fails on the example or customer design, the test programmer debugs the offending test case. Typically, the test programmer inspects the wave file for the simulation and cross-reference this to the messages displayed on the standard output. Because this approach can be very time consuming, the Root Port Model offers an output logging mechanism to assist the tester with debugging failing test cases to speed the process.

The Root Port Model creates three output log files during each simulation run. They are tx.dat, rx.dat, and error.dat. The rx.dat and tx.dat files each contain a detailed record of every TLP that was received and transmitted, respectively, by the Root Port Model.
Tip: With an understanding of the expected TLP transmission during a specific test case, you can isolate the failure.

The error.dat file is used with the expectation tasks. Test programs that use the expectation tasks generate a general error message to standard output. Detailed information about the specific comparison failures that have occurred due to the expectation error is found in error.dat.