The transfer of a message on the RQ interface is similar to that of a memory write
request, except that a payload can not always be present. The transfer starts with the
128-bit descriptor, followed by the payload, if present. When the Dword-aligned mode is
in use, the first Dword of the payload must immediately follow the descriptor. When the
address-alignment mode is in use, the payload must start in the beat following the
descriptor, and must be aligned to byte lane 0. The addr_offset input
to the integrated block must be set to 0 for messages when the address-aligned mode is
in use. The integrated block determines the end of the payload from
s_axis_rq_tlast and s_axis_rq_tkeep signals. The
First Byte Enable and Last Byte Enable bits (first_be and
last_be) are not used for message requests.