The AXI Memory Init IP requires one active-Low reset for all interfaces,
aresetn. The reset is synchronous to aclk. AXI networks
connected to the SI and MI interfaces should be reset concurrently with this IP.
The AXI Memory Init IP requires one active-Low reset for all interfaces,
aresetn. The reset is synchronous to aclk. AXI networks
connected to the SI and MI interfaces should be reset concurrently with this IP.