Xilinx Model Zoo Performance - 4.1 English

DPUCZDX8G for Zynq UltraScale+ MPSoCs Product Guide (PG338)
Document ID
PG338
Release Date
2023-01-23
Version
4.1 English

In this section, the performance of several models is provided for reference. The results shown in the following table were measured on a Xilinx® ZCU102 board with three B4096 cores with 6 threads running at 287 MHz. A complete listing of Xilinx® Model Zoo performance for the ZCU102, ZCU104 and Kria KV260 is available here: https://github.com/Xilinx/Vitis-AI/tree/master/model_zoo#model-performance

Table 1. Performance of Different Models
Network Model Workload (GOPs per image) Input Image Resolution Accuracy (DPUCZDX8G) 2 Frames per second (FPS)
Inception-v1 3.16 224*224 Top-1: 0.6984 472.5
ResNet50 7.7 224*224 Top-1: 0.7334 194.1
MobileNet_v2 0.59 224*224 Top-1: 0.6349 747.3
SSD_ADAS_VEHICLE 1 6.3 480*360 mAP: 0.4261 297
SSD_ADAS_PEDESTRIAN 1 5.9 640*360 mAP: 0.5968 278.3
SSD_MobileNet_v2 6.57 480*360 mAP: 0.2931 113.3
YOLO-V3-VOC 65.42 416*416 mAP: 0.8127 34.7
YOLO-V3_ADAS 1 5.46 512*256 mAP: 0.5305 272.6
  1. These models were pruned by Vitis AI Optimizer.
  2. Accuracy values with 8-bit quantization.