DPUCZDX8G with Enhanced Usage of DSP - 4.1 English

DPUCZDX8G for Zynq UltraScale+ MPSoCs Product Guide (PG338)

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A DSP Double Data Rate (DDR) technique may be used to used to improve the performance achieved with the DPU. In this configuration, two input clocks for the DPUCZDX8G are needed: A 1x clock for general logic and a 2x clock for DSP slices are employed. For more information, see Clocking. The difference between a DPUCZDX8G not using the DSP DDR technique and a DPUCZDX8G enhanced usage architecture is shown in the following image.

Note: All DPUCZDX8G architectures referred to in this document refer to DPUCZDX8G enhanced usage, unless otherwise specified.
Figure 1. DPUCZDX8G with (Enhanced Usage) and without DSP DDR