The following figure shows the example design for the Soft ECC Proxy.
Figure 1.
Core Example
Design
The example design contains the following:
- An instance of the Soft ECC Proxy. During simulation, the Soft ECC Proxy core is instantiated as a black box and replaced during implementation with the structural netlist model generated by the AMD Vivado™ IP Catalog IP customizer for timing simulation or a behavioral model for the functional simulation.
- Global clock buffers for top-level port clock signals.