Port Names - 1.0 English

Audio Clock Recovery Unit LogiCORE IP Product Guide (PG335)

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1.0 English
Table 1. Port Names and Description
Port Name I/O Clock Description
s_axi_ctrl_aclk I Clock Input clock for AXI4-Lite interface
s_axi_ctrl_aresetn I Reset active-Low reset for AXI4-Lite interface
s_axi_ctrl*   s_axi_ctrl AXI4-Lite Interface
acr_clk I Clock Input for ACR data
acr_resetn I Reset active-Low reset input to reset the ACR logic
acr_cts I CTS/Naud Input for CTS data (HDMI) or NAUD (DisplayPort)
acr_n I N/Maud Input for N data (HDMI) or MAUD (DisplayPort)
acr_valid I ACR valid Single bit data indicating presence of valid N and CTS value
aud_mclk I Clock Audio clock generated from the external clock chip
aud_mrst I Reset active-High reset input to reset the Mclk logic
ref_clk I Clock Reference input clock from which the audio sampling clock is to be recovered
ref_clk_resetn I Reset active-Low reset input to reset the ref clk logic
fifo_datacount_in I FIFO count This is the data count of the FIFO that is used to buffer the audio data. This has to be connected to a valid signal when using ACR in loop control mode
aud_clk_out O - This is the recovered audio sampling clock
irq O Interrupt output This is currently unused