Table 1. RX Initialization (RXI) Register
Bit |
Default Value |
Access Type |
Description |
Channel 1 |
0 |
0 |
RW |
GTRXRESET |
3:1 |
0 |
RO |
Reserved |
4 |
0 |
RW |
RX_LNKRDY_SB_MASK |
5 |
0 |
RW |
GTRXMSTRESET |
6 |
0 |
RO |
Reserved |
7 |
0 |
RW |
PLL_GT_RESET |
Channel 2 |
8 |
0 |
RW |
GTRXRESET |
11:9 |
0 |
RO |
Reserved |
12 |
0 |
RW |
RX_LNKRDY_SB_MASK |
13 |
0 |
RW |
GTRXMSTRESET |
14 |
0 |
RO |
Reserved |
15 |
0 |
RW |
PLL_GT_RESET |
Channel 3 |
16 |
0 |
RW |
GTRXRESET |
20:17 |
0 |
RO |
Reserved |
21 |
0 |
RW |
RX_LNKRDY_SB_MASK |
22 |
0 |
RW |
GTRXMSTRESET |
23 |
0 |
RW |
PLL_GT_RESET |
Channel 4 |
24 |
0 |
RW |
GTRXRESET |
27:25 |
0 |
RO |
Reserved |
28 |
0 |
RW |
RX_LNKRDY_SB_MASK |
29 |
0 |
RW |
GTRXMSTRESET |
30 |
0 |
RO |
Reserved |
31 |
0 |
RW |
PLL_GT_RESET |