Program and Interrupt Flow - 1.0 English

HDMI GT Controller LogiCORE IP Product Guide (PG334)

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1.0 English

The HDMI GT Controller core driver manages the dynamic reconfiguration of the multi-gigabit transceiver and digital clock manager modules to allow seamless transmission and reception of HDMI video to and from the FPGA physical interface.

The main program flow is shown in the following sections. At execution, the software application initializes the HDMI GT Controller IP and registers the callback functions in the provided hooks. After the initialization, all API calls are interrupt triggered starting from either TX or RX reference clock change.

Note: The HDMI GT Controller driver does not carry the video format, resolution, or color space information. Such information is handled by the HDMI TX and RX MAC. See the following documents for more information:
  • HDMI 1.4/2.0 Transmitter Subsystem Product Guide (PG235)
  • HDMI 1.4/2.0 Receiver Subsystem Product Guide (PG236)
  • HDMI 2.1 Transmitter Subsystem Product Guide (PG350)
  • HDMI 2.1 Receiver Subsystem Product Guide (PG351)