| Port Name | I/O | Clock Domain | Description |
|---|---|---|---|
| tx_axi4s_ch<i>_ tready | O | GT_TXUSRCLK |
AXI4-Stream tready indicator <i>: Transceiver channel index |
| tx_axi4s_ch<i>_ tvalid | I | GT_TXUSRCLK |
AXI4-Stream tvalid indicator. <i>: Transceiver channel index |
| tx_axi4s_ch<i>_ tdata 1 | I | GT_TXUSRCLK |
AXI4-Stream tdata bus <i>: Transceiver channel index GT Mapping: TXDATA_IN |
| tx_axi4s_ch<i>_ tuser | I | GT_TXUSRCLK |
AXI4-Stream tuser bus <i>: Transceiver channel index Unused |
| rx_axi4s_ch<i>_ tready | I | GT_RXUSRCLK |
AXI4-Stream tready indicator <i>: Transceiver channel index |
| rx_axi4s_ch<i>_ tvalid | O | GT_RXUSRCLK |
AXI4-Stream tvalid indicator. <i>: Transceiver channel index |
| rx_axi4s_ch<i>_ tdata 2 | O | GT_RXUSRCLK |
AXI4-Stream tdata bus <i>: Transceiver channel index GT Mapping: RXDATAOUT |
| rx_axi4s_ch<i>_ tuser | O | GT_RXUSRCLK |
AXI4-Stream tuser bus <i>: Transceiver channel index Unused |
|
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Note: If the lanes are swapped on board due to PCB routing, the
same can be offset by swapping the GT interfaces between the HDMI GT Controller and the GT Quad.