The HDMI GT Controller opens the gt_refclk[0-5]_odiv2 ports when selected as the reference
clock source from the Vivado IDE. See the following
figure on how to connect the GT reference clock from a differential input to the
HDMI GT Controller and GT Wizard.
Two Utility Buffers and a Constant instance are needed to fully connect the GT reference clocks, configured as IBUFDSGTE, BUFG GT, and a constant value of 1 respectively. Follow the clock buffer connections as shown in the following figure.
Figure 1. Connecting the GT Reference Clock
Note: BUFG_GT_CE port of the BUFG_GT
buffer must be driven High.
Note: IBUF_DS_ODIV2 port of the IBUFDSGTE is by default configured to output
divide by 1.
Note: It is not necessary that the
transceiver
GT_REFCLK always corresponds to the same
refclk as the HDMI GT Controller (hdmi_gt_controller)
core. For example, the RX refclk can be connected to the HDMI GT Controller core's gt_refclk0_odiv2
port while the same refclk can be connected to the transceiver's REFCLK1. Refer to the
clock connection guidance from the AMD Versal™
GT
Quad.