Revision History - 1.1 English

The following table shows the revision history for this document.

Section	Revision Summary
10/24/2023 Version 1.1
Block Automation Flow Sub GUI Configuration Tab Simulating the Example Design	Updated.
05/22/2023 Version 1.1
Reset State Machines Reset Sequencing and Other Services AMD IP and Custom IP Sharing the GT Quad General Guidelines for GT Quad Users in IP Integrator Changing Advanced Receiver Settings	Added new sections.
Reset Controller Helper Block IP Integrator (IPI) Design Entry for Custom IP GT Reference Clock Summary and Optimization Limitations of the Example Design	Updated.
10/19/2022 Version 1.1
Reset Controller Helper Block	Added a new section in Example Design
Sub GUI Configuration Tab	Updated the sections in Design Flow Steps
GT Reference Clock Summary and Optimization	Updated the sections in Design Flow Steps
04/29/2022 Version 1.1
Product Specification	Updated link for Versal Adaptive SoC GTM Transceivers Architecture Manual (AM017)
04/26/2022 Version 1.1
Product Specification IP Integrator (IPI) Design Entry for Custom IP Sub GUI Configuration Tab Simulating the Example Design	Updated sections.
06/16/2021 Version 1.1
General updates	Updated references for GTYP and GTM
11/23/2020 Version 1.1
General updates	Updated Product Specification Updated Customizing and Generating the Core Updated GT Quad Sharing Multiple Bridge IPs Added AMD IP - GT Quad Integration Updated Example Design
07/14/2020 Version 1.0
Initial release	N/A

Revision History - 1.1 English - PG331