NVMe Target Controller Interfaces - 3.0 English

NVMe Target Controller LogiCORE IP Product Guide (PG329)
Document ID
PG329
Release Date
2021-10-27
Version
3.0 English

The interfaces of NVMe Target Controller IP are given in the following table along with the connectivity expected.

Table 1. NVMe Target Controller Interfaces
Interface Name Interface Type Interface Block Interface Data Width (bits) Clock Domain Purpose
c2h_wqe_fifo_full Active-High HW 1 qdma_clk TC application should not generate C2H work queue entries when this full signal is asserted.
h2c_wqe_fifo_full Active-High HW 1 qdma_clk TC application should not generate H2C work queue entries when this full signal is asserted.
nvme_tc_intr Active-High SW 1 qdma_clk NVMe TC IP events notification to software.
pcie_link_up Active-High QDMA 1 qdma_clk PCIe link-up event
usr_flr Native Interface QDMA 8 qdma_clk Function level reset information from QDMA.
sgl_prp_fill_m_axis AXI-ST(M) HW 16 qdma_clk Fill notification of PRP to hardware application.
host_s_axi_lite AXI4-L (S) HOST 32 qdma_clk To access NVMe 1.3 Spec registers via QDMA AXI4-Lite Bridge IF.
qdma_m_axi_lite AXI4-L (M) QDMA 32 qdma_clk To access QDMA registers from NVMe TC IP. For more information, see QDMA Register Access (C_CPM_QDMA = 0).
sw_s_axi_lite AXI4-L (S) SW 32 lite_clk NVMe TC IP Control and Status Registers access.
wqe_cmpl_m_axis AXI-ST (M) HW 64 qdma_clk To push Work Request completions.
m_axis_c2h_cmpt AXI4-ST (M) QDMA 128 qdma_clk To Write Completion Queue Entry (CQE) to QDMA CMPT Ring.
sgl_prp_req_axis AXI4-ST (S) HW 128 qdma_clk Request from the hardware application to fetch the next set of PRPs for a command.
sw_s_axi AXI4-MM (S) SW 128 qdma_clk Software interface to push Admin Queue related WQEs (Work Queue Entries or instruction) to NVMe TC.
c2h_byp_in Req/Rdy (S) QDMA 256 qdma_clk To get C2H (card-to-host) data descriptors completion notification.
c2h_byp_out Req/Rdy (M) QDMA 256 qdma_clk To program C2H (card-to-host) DMA descriptors.
h2c_byp_in Req/Rdy (S) QDMA 256 qdma_clk
  • Incoming to read SQE entries.
  • Incoming to get DMA descriptor completion notifications.
h2c_byp_out Req/Rdy (M) QDMA 256 qdma_clk To program descriptor to fetch PRP entries and H2C (host-to-card) DMA descriptors.
wqe_s_axis AXI4-ST (S) HW 256 qdma_clk Hardware application interface to push WQEs to NVMe TC IP.
cmd_m_axis AXI4-ST (M) HW 512 qdma_clk To push SQEs.
ddr_m_axi AXI4-MM (M) BRAM/DDR 512 qdma_clk This interface is used for the following transfers:
  • To write admin commands.
  • To write I/O commands PRP.
  • To read/write H2C/C2H data payload.
m_axis_c2h AXI4-ST (M) QDMA 512 qdma_clk To write C2H data payload to QDMA.
s_axis_h2c AXI4-ST (S) QDMA 512 qdma_clk This interface is used for the following transfers
  • To receive PRPs from QDMA.
  • To receive H2C data payload.
  1. qdma_clk is fed from QDMA clock.
  2. lite_clk is the slower clock.